The present invention relates generally to printed circuit board testing, and more particularly to techniques for implicitly encoding and decoding preferred probing locations in a printed circuit board design.
Electronic products typically contain at least one printed circuit board (PCB). A PCB generally includes a plurality of electronic components that are electrically connected together by electrical paths called “nets” that are formed of various combinations of conductive traces, vias, wires, and solder, to form an operational circuit that performs a given function. A conventional PCB development cycle is illustrated by the Gantt chart shown in FIG. 1. As illustrated, the conventional PCB development cycle includes three main stages—namely, PCB design, test development, and fixture development. As shown, each of the stages is generally serial in nature, requiring a number of steps to be performed. The time-to-market of the PCB, and hence of the product that utilizes the PCB, is affected by the duration of time spent in completing each of the steps of each stage. While actual duration values for each step are shown in FIG. 1, it is to be understood that these values are merely illustrative of a typical development cycle for a typical PCB design and will be different from PCB design to PCB design, varying according to PCB design complexity, available tools, actual test development techniques applied, designer and test experience, etc.
Where possible, given the current state of the art of available development tools in the market, many steps involved in PCB design, test development and fixture development are automated, either fully or at least partially. For example, large automated industrial CAD development systems have been developed that allow floorplanning, schematic capture, trace routing, design verification, and even test generation. These automated features have significantly improved the time-to-market of an integrated circuit assembly. In the past, the addition of test pads to the circuit during the PCB design stage and the addition of board pushers for push-down top gate fixtures during the fixture development stage have been difficult to automate. The reasons for this are multifold, a better understanding of which will become clearer through a more detailed description of the PCB development process.
To this end, during the PCB design stage, a CAD system is used to design and lay out the PCB, including schematic capture and component and trace layout of the PCB under development. After design and layout of the circuit are complete, conventionally the circuit designer manually adds test pads for board testing (such as in-circuit test (ICT)), the goal being to provide probing access on all nets, or at least on all nets of interest, on the PCB. Conventional test pads are implemented as extensions of traces on the exposed trace layers in that they lie in the same plane as one of the exposed trace layers and are formed integrally with traces on the exposed trace layer using the same trace material. Test pads are typically round, square, or some other planar geometric shape and have a surface area large enough to accommodate a probe head [KP1]so that when the PCB is probed at the test pad, the probe does not contact other traces or components on the PCB. Furthermore, the size of a test pad is also determined by pointing errors in probe placement that may cause lateral offsets. Thus a test pad may be somewhat larger than the probe head itself, to assure a good probability of hitting it. Because conventional test pads occupy area on the trace layer, the addition of test pads to the PCB design often require rerouting of nets of the PCB design. The addition of test pads to the design using conventional techniques also carries risks in adversely affecting surrounding circuitry or changing the transmission line characteristics of the traces over which high-speed signals are communicated. Accordingly, whenever a test pad is added to the PCB design using conventional techniques, the effects of the design change must be either calculated or simulated in order to ensure that the location of the test pad and its associated changes to the design do not adversely affect circuit operation. Because the test pad insertion step requires mainly manual effort and is iterative in nature, this step, as illustrated in FIG. 1, might add several days (e.g., 5 days in the example shown) to the PCB design process, yet still not result in 100% probing access.
Referring again to the PCB development cycle of FIG. 1, once the design has been captured, routed, and test pads are added, the CAD data files representing the PCB design with test pads inserted are then released for test development. In-Circuit Test (ICT) is a well-known test methodology that includes testing hardware that can probe nets of the PCB through a combination of tester relays, tester interface pins, and custom fixturing. More particularly, FIG. 2 illustrates a portion of an ICT tester environment 200. The tester environment 200 includes an automated tester 210 that implements the test electronics 212, including measurement circuits, relays, control electronics, etc. The tester 210 provides a field of tester interface pins 214, which are arranged in a fixed configuration and may be connected to various measurement circuits within the test electronics 212 by way of electronically controlled relays (not shown). Because the tester interface pin field is a fixed configuration, in order to probe test pads 204 on a PCB under test 202, the PCB 202 is generally mounted in a customized fixture 220 which operates as an adapter between fixed configuration tester interface pins 214 and various test pads 204 on the PCB 202.
The test fixture 220 includes a probe protection plate 240, standard spring probes 232 whose tips exactly correspond to test pads 204 on the bottom of the PCB under test 202, a top push-down gate 250 which opens and closes by way of a hinge 252, spacers called board pushers 258 mounted in the bottom of the push down gate 250 which limit the deflection of the PCB 202 under vacuum loading, a probe mounting plate 230 in which the spring probes 232 are installed, personality pins 226 which are wired to the spring probes 232, and an alignment plate 222 which aligns the wirewrap tails of the personality pins 226 into a regularly spaced pattern so that they line up with tester interface pins 214 mounted in the tester 210. As known in the art, a spring probe is a standard device, commonly used by the test community, which conducts electrical signals and contains a compression spring and plunger that move relative to the barrel and/or socket when actuated. A solid probe also conducts electrical signals but has no additional parts which move relative to each other during actuation.
During test, the PCB under test 202 is pulled down by vacuum or other known mechanical means so that the test pads 204 on the bottom of the PCB under test 202 contact the tips of the spring probes 232. The sockets of the standard spring probes 232 are wired to personality pins 226, and the alignment plate 222 funnels the long, flexible personality pin tips into a regularly spaced pattern. The tips of personality pins 226 contact the tester interface pins 214 mounted in the tester 210. Once electrical contact between the PCB under test 202 and the tester 210 is established, in-circuit or functional testing may commence.
Referring back to FIG. 1, during the test development stage the CAD data is translated as necessary into native formats of the test platform (i.e., formatted into a format expected by the ICT tester), from which tests are developed. Most of today's PCB testers come with software packages that can automatically generate tests when full access is available. Some testers, for example, the Agilent 3070 In-Circuit Test (ICT) Board Test System, manufactured by Agilent Technologies, Inc. having headquarters in Palo Alto, Calif., also include fixture generation software that automatically generates fixture design files needed to build an ICT fixture. This fixture generation software chooses probe locations on a net by net basis to minimize board flex in fixtures. Using conventional test pad fabrication technologies, however, implementation of alternate plural probing locations along the nets are rare since adding even a single test pad to a net, as described above, is so painful in terms of board real estate, risk of adverse impact to circuit performance, time, and cost.
Recently, a new technology for implementing test access structures (i.e., test pads) on PCBs has been introduced. Test access structures, herein called “bead probes”, that are fabricated using this new technology are implemented along the z-dimension, in an x-, y-, z-coordinate system, of traces printed along an x-y plane implemented as an outer layer of the PCB. Each bead probe is conductively connected to a trace at a desired probing location directly on top of the trace and along the z axis of the x-, y-, z-coordinate system above an exposed surface of the printed circuit board to be accessible for electrical probing by an external device. Because bead probes are implemented along the z-dimension along traces in an x-y plane, they take up no real estate in the x-y dimension. Thus, the use of bead probe technology allows test pads in the form of bead probes to be implemented anywhere along a net of a PCB without having to alter the PCB design. In addition, research has shown that bead probes may be fabricated along existing nets of the PCB design without impacting the high-speed electrical characteristics of the net (See “A New Probing Technique for High-Speed/High Density Printed Circuit Boards”, International Test Conference, October 2004, the entire document of which is incorporated herein by reference for all that it teaches). Bead probes are described more fully in U.S. patent application Ser. No. 10/670,649, to Parker et al., entitled “Printed Circuit Board Test Access Point Structures and Method for Making the Same”, filed Sep. 24, 2003 and assigned to the assignee of interest herein, the entire disclosure of which is incorporated herein by reference for all that it teaches. With the advantages of the new bead probe technology, the industry is quickly embracing bead probes as the new methodology for test pad implementation. Further, due to the non-impact on the PCB design and circuit performance by the addition of bead probes to the PCB, multiple bead probes per net (where practically feasible) can be easily and quickly added to allow for alternate probing locations.
Again referring to FIG. 1, once the test pad locations are determined and added to the PCB design, fixture design files for ICT testers containing fixture build information are created. Fixture design files typically include specifications for the board outline coordinates, tooling pin holes and locations, drill, probe and socket insertion, and wiring information, but leave the decision of other fixture components such as board pushers and fasteners (e.g., retainer screws) to the fixture builder's discretion. The fixture builder must typically meet certain criteria such as maximum force per square unit, maximum board flex thresholds, etc. To meet these criteria, the fixture builder must consider the layout of the probes 232. An average fixture may include 3000 to 4000 probes 232, each exerting, for example, 8 ounces of force against the bottom of the PCB 202 during test. This works out to nearly a ton of force pushing upward against the PCB 202. If the counteracting forces of the probes and board pushers are not evenly distributed across the entire board, the PCB will flex and may cause faulty or even fatal test results. Accordingly, most ICT fixtures include a top push-down gate 250 with push-down spacers, herein called board pushers 258, to counteract the fixture probe forces as shown in FIG. 2. The fixture designer must balance the board by strategically positioning the board pushers in the fixture to counteract the forces of the fixture probes so as to eliminate or significantly reduce board flex. However, with the increasing availability of alternate probing locations on many of the nets in PCB designs that now utilize bead probes as the test pad implementation of choice, fixture designers are now often faced with having to choose which one of several alternate locations to implement the fixture probe servicing that net. Whereas all alternate probing locations on a net will allow probing of that net, on the larger scale, when taking into account the probing locations of other nets, not all probing locations are equal in terms of overall board flex. In other words, there is a “best” set of probing locations (one probe per net) that results in minimized board flex. However, unless the fixture designer is privy to that information, the fixture designer is faced with the daunting task of choosing fixture probe locations, one per net, from among possibly many locations per net, in which to implement fixture probes for probing the PCB during test. If the “best” set of probing locations is not selected, board flex may result that exceeds minimum specifications for optimal probing. Currently, is no existing automated technique for determining preferred probing locations in a fixture. Instead, the fixture probe and board pusher layout is usually designed manually after importing the fixture files resulting from the PCB design into a CAD tool (typically AutoCAD). Board pusher layout can be time-consuming, and since done manually, may not truly minimize board flex.
It is clear from the above description of the PCB development process that it would be desirable to automate the determination of fixture probe locations in the fixture design process. It would further be desirable to automate the determination of the “best” set of fixture probe locations (or “preferred locations”) for PCB designs that implement multiple test pads on many of the nets to allow for alternate probing locations on these nets. It would further be desirable to utilize bead probe technology to implement multiple test pads along nets that can physically accommodate additional bead probes in order to provide a set of alternate probing locations for optimization of probe locations to reduce board stress while at the same time allowing some flexibility in the probing locations to accommodate fixture components such as board pushers. It would also be desirable to automate the designation of preferred and alternate probing locations for those nets that support alternate probing locations. It would further be desirable to implicitly encode the preferred probing locations in the PCB design itself to allow fixture design and build directly from the PCB design.